PCB Testing, Inspection, and Standards: A Practical Terminology Handbook

Basic Terms: Test Object, Inspection Method, and Acceptance Criteria

Consider the solder between the two leads on U3. The image records what the inspector saw. The resistance reading shows whether an electrical path exists. The schematic establishes whether the leads are intended to connect, and the applicable workmanship criterion determines whether the physical condition is acceptable. Keeping those findings separate prevents an observation from becoming an unsupported diagnosis.

Bare-Board Testing: Continuity, Isolation, Opens, and Shorts

A net is a set of points intended to share an electrical connection. A netlist identifies those points. Suppose the design assigns connector pad J1-1 and test point TP3 to the input supply, VIN, and assigns TP4 to ground. The tester can check continuity between J1-1 and TP3, then check isolation between VIN and ground. Record the netlist revision alongside the board revision. A tester running an obsolete netlist can correctly execute the wrong checks.

An open indication has several possible explanations. A trace may be broken, a via may have excessive resistance, or a probe may have landed on residue. A direct measurement at the same pads helps separate a board fault from a fixture contact problem. Likewise, a failed isolation test warrants a resistance measurement before the report identifies a metallic short. Surface contamination can also create a leakage path.

Flying-probe testing uses movable probes to contact programmed locations in sequence. A bed-of-nails fixture uses an array of probes positioned for a particular board layout. Either report should identify the board, the tests performed, and any inaccessible or excluded nets. The equipment name alone cannot establish coverage.

Assembly Inspection and Testing: SPI, AOI, AXI, ICT, and FCT

In in-circuit test, the component remains connected to the surrounding circuit. For example, a resistor measured through two test points may have another conductive path in parallel. The ICT program must account for that path when setting its limits.

On the same charging board, AOI might inspect regulator orientation, ICT might check a feedback resistor, and FCT might measure the regulated output at a 1 A load. Each result supports a different conclusion. Use the project's abbreviation list when reading reports, particularly where two factories use different names for the same functional test step.

Test Fixture and Probe Terminology

A test point is a designated location on the board. A test probe makes temporary electrical contact with it. In a spring-loaded probe, commonly called a pogo pin, the tip retracts as the fixture closes. A receptacle holds a replaceable probe and connects it to the fixture wiring. The test fixture locates and supports the board while making those connections.

Probe numbers and PCB test-point numbers belong to different drawings. A channel map connects them:

Pitch is the center-to-center spacing between probe positions. Working travel, or working stroke, is the distance the plunger moves from its unloaded position when the fixture closes. Contact force is the force applied at a stated compression. A force value becomes useful only when the report gives the stroke or installed height at which it was measured.

For a fixture contact review, Dongguan Xinteng Electronics Co., Ltd. can use the board's test-point drawing, pad finish, probe pitch, and closed fixture height to assess a pogo pin against the intended application. Including the instrument channel map helps distinguish a contact that carries load current from one used to sense voltage.

Contact Resistance and Four-Wire Measurement

Contact resistance is meaningful only when the measurement endpoints are identified. A reading from a probe terminal to a PCB pad includes the probe's internal conductive path and its contact with the pad. Moving one endpoint back to the fixture connector adds wiring and terminations to the reading.

In a four-wire, or Kelvin, measurement, one pair of leads supplies the test current and a separate pair senses voltage at the chosen endpoints. Resistance is calculated from the sensed voltage divided by the applied current. Mark both sense points on the fixture drawing. That allows a technician to repeat the original measurement after replacing a probe or repairing a wire.

Reading Results: Limits, Coverage, False Failures, and Escapes

Nominal Value, Tolerance, and Test Limits

The nominal value is the design target. The tolerance defines the permitted variation. The lower and upper limits give the acceptance interval, and the measured value records what the instrument read.

For example, suppose a product specification calls for 5.00 V ±5% at the board's output pads under a 1.00 A load. The permitted range is 4.75 to 5.25 V. A reading of 4.70 V fails by 0.05 V. Recording the value and its units preserves information that a single "Fail" entry would lose.

Node, Fault, and Functional Coverage

If a board has 100 design nets and the program tests all 90 accessible nets, the result is 100% of accessible nets or 90% of design nets. The denominator determines what the claim means.

False Fail, Test Escape, and First Pass Yield

A false fail occurs when a conforming unit receives a failure result. A sticking probe can cause a good charging board to fail under load. Passing after the fixture is reopened is a reason to investigate. Confirm the diagnosis by checking the affected path and testing the board on an independently verified station.

A test escape occurs when a defective unit passes through the applicable test without detection. A program might read the expected firmware version yet omit the command that enables charging. A board with a defective output switch could then pass. Running a sample with that confirmed fault shows whether the revised program detects it.

First pass yield (FPY) counts units that pass on their first attempt. If 100 boards enter FCT, 92 pass immediately, five pass on retest without repair, and three pass after repair, FPY is 92%. All 100 may eventually pass, but the first failures still matter: they reveal how often the process required a second test or a repair.

Which Standard Governs the Result?

Use the revision identified in the purchase agreement or approved quality plan. IPC lists IPC-9252B as no longer maintained, although a project may still invoke that revision. For an assembly example, IPC-A-610J clause 8.3.12.4 addresses voids in surface-mount area-array solder connections. The allowable output voltage of a particular charging board comes from its approved product or functional test specification.

Worked Example: Tracing a Low Output Voltage Failure

The following teaching example follows one charging interface board through an initial failure, diagnosis, and retest. Its identifiers and readings are illustrative.

Confirm the observation. This board routes its 5 V input through a controlled output switch. The first run establishes that the loaded output at TP6 was low. It leaves the cause open.

Measure the input at the board. An independent meter reads 5.10 V at the source terminals and 4.74 V at the board input pads under the same load. The incoming supply and return paths together drop 0.36 V. Only 0.04 V separates the board's input and output readings. Those measurements direct the investigation toward the fixture before anyone replaces the output switch.

Check whether the fault follows the board or the station. A known-good board also shows a low input on F02. Unit 0042 passes on a verified second station. Back on F02, a measurement from the supply probe terminal to its mating pad shows 0.32 V across that section under load. Most of the incoming loss is now localized to the probe path and its interface with the board.

Preserve both results. After replacing the suspect probe, the technician repeats the test with the known-good board and then measures 5.04 V on unit 0042 at TP6–TP7. The unit record retains the 4.70 V first failure, diagnostic readings, probe position, maintenance action, and linked retest. A buyer reviewing the batch can see why the board was released and why its first run still counts as a failure in FPY.

Abbreviation Index

Technical References

IPC. IPC-9252B: Requirements for Electrical Testing of Unpopulated Printed Boards. September 2016. Sections 1 and 1.1, scope and purpose.

IPC. IPC-A-610J: Acceptability of Electronic Assemblies. March 2024. Section 1.1, scope, and Section 8.3.12, surface-mount area arrays.